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| Phase #2:
Reorder opcodes:
delay slots |
The next step is to do simple opcode reordering, on fragments
that use the delay slot and to identify simple temporary
register usage.
Delay slots are replaced with nop.
This simplifies (human) perception of control flow.
More complex cases, in which conditional codes are set in the
delay slot or delay slots after a label, have to be handled specially.
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.section ".rodata1",#alloc
.align 4
.l0:
.asciz "%u %u\n"
.section ".text",#alloc,#execinstr
.align 4
.global main
main:
save %sp,-96,%sp
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sethi %hi(.l0),%g2
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reorder sethi/add/or;
use synthetic instruction
set
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mov 1,%i1
clr %o1
add %g2,%lo(.l0),%i0
mov 1,%o0
clr %i2
.l1:
cmp %i1,1
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be .l7
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reverse the branch condition and use an additional label if an opcode
follows that sets conditional codes
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btst 1,%o0
.l2:
bne .l3
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srl %o0,1,%g2
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replace delay slots
(simple cases);
nop
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inc %i2
srl %o0,1,%o0
ba .l4
cmp %o0,1
.l3:
add %o0,%g2,%g2
inc 2,%i2
add %g2,1,%o2
cmp %o2,%o0
bcs .l6
mov %o2,%o0
cmp %o0,1
.l4:
bne .l2
btst 1,%o0
ba .l8
cmp %i2,%o1
.l6:
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ret
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substitute ret with retl
as well
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restore %g0,0,%o0
.l7:
cmp %i2,%o1
.l8:
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bleu,a .l9
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reverse the branch condition and use an additional label if annulled;
bgu
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inc %i1
mov %i0,%o0
mov %i1,%o1
inc %i1
call printf
mov %i2,%o2
mov %i2,%o1
.l9:
mov %i1,%o0
ba .l1
clr %i2
.type main,2
.size main,(.-main)
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